The present invention relates to signal processing, and, in particular, to techniques for linearizing amplifiers used in communications systems using feed-forward compensation.
Amplifiers, such as high-power amplifiers used in the base stations of wireless communication systems, typically exhibit non-linearity over their operating ranges. This non-linearity can result in noise that can corrupt or otherwise interfere with the communications. To address this problem, additional circuitry may be added to an amplifier in an attempt to linearize the effective amplifier response. Conventional techniques for linearizing amplifiers typically involve pre-compensation and/or feed-forward compensation.
In amplifier linearization based on pre-compensation, the input signal that is to be amplified is pre-distorted prior to being applied to the amplifier in order to adjust the input signal based on known non-linearities in the amplifier transfer function. The pre-distortion module is typically controlled using a feed-back signal based on the output signal generated by the amplifier. In feed-forward compensation, an auxiliary signal is fed forward and combined with the output of the amplifier to adjust the output signal for non-linearities in the amplifier transfer function.
FIG. 1 shows a high-level block diagram of a linearized amplifier circuit 100 according to the prior art. Amplifier circuit 100 utilizes both pre-compensation and feed-forward compensation to linearize the response of a high-power amplifier (HPA) 104. Amplifier circuit 100 has a main signal processing channel and an auxiliary signal processing channel. The main channel includes pre-distorter 102, HPA 104, and high-power delay module 106, while the auxiliary channel includes delay module 110, summation node 114, and low-power amplifier (LPA) 116. In addition, amplifier circuit 100 includes summation node 108.
The input signal is applied to both pre-distorter 102 and delay module 110. Pre-distorter 102 pre-distorts (i.e., pre-compensates) the input signal prior to being applied to HPA 104. The output from HPA 104 is applied to high-power delay module 106 and coupled off at node 112. Summation node 114 subtracts the delayed input signal of delay module 110 from the attenuated amplifier signal from node 112 to generate the input to LPA 116. Summation node 108 subtracts the output of LPA 116 from the delayed output of HPA 104 to generate the linearized output signal.
Although not shown in FIG. 1, amplifier circuit 100 would also typically have a third (xe2x80x9cfeed-back controlxe2x80x9d) channel in which control signals are generated based on output signals from one or more of the various components (e.g., pre-distorter 102, HPA 104, summation node 114, and/or LPA 116) and used to control the operations of different components, such as pre-distorter 102 and/or LPA 116.
The purpose of delay modules 106 and 110 is to ensure synchronization between the pairs of signals combined at summation nodes 108 and 114, respectively. In particular, delay module 110 delays the input signal to account for the processing time of pre-distorter 102 and HPA 104, while high-power delay module 106 delays the high-power output of HPA 104 to account for the processing time of summation node 114 and LPA 116. These delays become more and more undesirable as the speed of data communications increases.